1. Field
The embodiment relates to frame transmission systems and frame transmission apparatuses for transmitting frames, and more particularly, to a frame transmission system and a frame transmission apparatus for implementing link aggregation.
2. Description of the Related Art
A link aggregation technique using multiple cables in an integrated manner as a single logic path is defined by Institute of Electrical and Electronic Engineers (IEEE) 802.3ad for frame transmission systems using Layer 2 switches to achieve higher capacity.
FIG. 1 is a block diagram showing an example of a network using an Ethernet frame transmission system.
The network shown in FIG. 1 includes a Layer 2 switch A 1 (hereinafter abbreviated as an “L2SWA1”), a Layer 2 switch B 2 (hereinafter abbreviated as an “L2SWB2”), and a Layer 2 switch C 3 (hereinafter abbreviated as an “L2SWC3”). The L2SWA1, the L2SWB2, and the L2SWC3 are each connected to a terminal 4. The L2SWA1 is connected to the L2SWB2 via three cables 5a, 5b, and 5c in parallel. The L2SWA1 is also connected to the L2SWC3 via a cable 5d. By setting the cables 5a, 5b, and 5c to form a link aggregation group, the cables 5a, 5b, and 5c can be logically handed as a single path. By setting the link aggregation group in this manner, a virtual path having a transmission band exceeding the transmission bands of the cables 5a, 5b, and 5c is realized.
FIG. 2 is a block diagram illustrating an Ethernet frame transmission system in the related art.
An L2SWA 91 at a sender side shown in FIG. 2 transfers a data stream constituted of a plurality of Ethernet frames (hereinafter may also be simply referred to as “frames”) to an L2SWB 92 at a receiver side via two cables. The two cables each have a transmission capacity of 1 Gbps. The two cables are set to form a link aggregation group. The two cables are referred to as a “link aggregation (LA) path a” and an “LA path b”. The L2SWA 91 includes an information extracting unit 911 which extracts information of frames supplied from a terminal (see FIG. 1), a distribution unit 912 which distributes the frames between the LA paths a and b, a hash calculation unit 917 which performs calculation using the extracted frame information, and two first-in first-out (FIFO) devices 915 and 916 corresponding to the LA paths a and b, respectively.
The information extracting unit 911 extracts Media Access Control (MAC) addresses from the header of each frame supplied to the L2SWA 91. The hash calculation unit 917 performs a hash calculation on the values of the extracted MAC addresses. A distribution processing determining unit 918 determines an LA path to transmit each frame in accordance with the result of the hash calculation. The distribution unit 912 distributes the frames between the FIFO devices 915 and 916 in accordance with the determination made by the distribution processing determining unit 918 and stores the distributed frames in the FIFO devices 915 and 916. The FIFO devices 915 and 916 output the stored frames in the order they are stored to the corresponding LA paths a and b, respectively.
In contrast, the L2SWB 92 at the receiver side shown in FIG. 2 collects frames transmitted via the two LA paths and outputs the collected frames to a terminal (see FIG. 1). The L2SWB 92 includes two FIFO devices 921 and 922 corresponding to the LA paths a and b, a multiplexer (MUX) 923, and a reading controller 924. Frames transmitted via the two cables are written into the FIFO devices 921 and 922. The reading controller 924 detects completion of writing of the frames into the FIFO devices 921 and 922. The reading controller 924 causes the multiplexer 923 to sequentially read the frames stored in the FIFO devices 921 and 922. The multiplexer 923 reconstructs the read frames. The multiplexer 923 outputs the reconstructed frames to a terminal. By integrating the two 1-Gpbs LA paths to form a single logic path, a 2-Gbps path is realized between the L2SWA 91 and the L2SWB 92.
In the Ethernet frame transmission system shown in FIG. 2, frames are distributed between the LA paths in accordance with the result of hash calculation of the MAC addresses of each frame. Accordingly, when frames with the same MAC addresses are transferred in a continuous manner, these frames are distributed to only one LA path. In this way, the paths are not efficiently utilized. In some cases, a FIFO overflow occurs, and the frames are discarded. In order to overcome this problem, frames with the same MAC addresses may be distributed among multiple LA paths, thereby utilizing the LA paths in an efficient manner. However, since frames with the same MAC addresses constitute a single stream, if these frames are distributed among multiple LA paths, the frames arrive at different times due to differences in transmission delay of the LA paths. As a result, the distributed frames may not be reconstructed in the original order.
For example, Japanese Unexamined Patent Application Publication Nos. 9-294099 and 11-341041 describe techniques for delaying a data transmission timing at a sender side according to the transmission delay. However, it is not practical to delay the transmission timing in a system where a link aggregation group has been formed to achieve higher processing rates.